Espressif Systems /ESP32-P4 /SPI2 /SPI_DIN_NUM

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Interpret as SPI_DIN_NUM

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SPI_DIN0_NUM 0SPI_DIN1_NUM 0SPI_DIN2_NUM 0SPI_DIN3_NUM 0SPI_DIN4_NUM 0SPI_DIN5_NUM 0SPI_DIN6_NUM 0SPI_DIN7_NUM

Description

SPI input delay number configuration

Fields

SPI_DIN0_NUM

the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

SPI_DIN1_NUM

the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

SPI_DIN2_NUM

the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

SPI_DIN3_NUM

the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

SPI_DIN4_NUM

the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

SPI_DIN5_NUM

the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

SPI_DIN6_NUM

the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

SPI_DIN7_NUM

the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

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